TYPE OF COURSE UNIT	Elective Course
LEVEL OF COURSE UNIT	Bachelor's Degree
YEAR OF STUDY	-
SEMESTER	-
NUMBER OF ECTS CREDITS ALLOCATED	5
NAME OF LECTURER(S)	Assistant Professor Gülşah Demirhan Aydın
LEARNING OUTCOMES OF THE COURSE UNIT	At the end of this course, the students; 1) To be able to make IC designs in any IC technology 2) To make device layout design and logic circuit layout design 3) To optimize logic circuit performance
MODE OF DELIVERY	Face to face
PRE-REQUISITES OF THE COURSE	No
RECOMMENDED OPTIONAL PROGRAMME COMPONENT	None
COURSE DEFINITION	Design methods of Very Large Scale Integrated Circuits (VLSI). Design verification and testing methods. Architectures of adders, multipliers, counters, ALU, memories and finite-state machines. Synchronization, meta-stability, PLL and DLL circuits. Integrated circuit design with programmable logic gates (CPLD, FPGA, FPLD). Introduction to hardware description language: VHDL. Practicing with the IC design and implementation using VHDL.
COURSE CONTENTS	WEEK TOPICS 1st Week Digital integrated circuits strategies for the implementation of full-custom, cell-based, array-based designs. 2nd Week Design flow. Structural design method. 3rd Week Design entry, simulation, synthesis tools. Property to determine the cell cycle, technical specifications document. 4th Week Design economics, costs, project management. 5th Week Finite state machines, state transition graphs and designs. 6th Week Hardware description languages, VHDL design. VHDL design examples. 7th Week Timing differences, synchronous design, asynchronous design, synchronizers. 8th Week Midterm 9th Week Timing, PLL, DLL, clock distribution 10th Week Design validation and test methods, fault models, boundary scan test method. 11th Week Arithmetic basic blocks, adder, multiplier 12th Week The basic blocks of arithmetic; similarity generator, comparator, zero / one sensor / counter, the binary counters, ALU. system clocking. 13th Week Course project based on FPGA 14th Week Memory: DDR, FLASH structures and schedules.
RECOMENDED OR REQUIRED READING	(1)J. M. Rabaey, A. Chandrakasan, B. Nikolic, "Digital Integrated Circuits: A Design Perspective", 2e Prentice Hall, International Edition, 2003; (2) R. J. Baker, H. W. Li, D. E. Boyce, "CMOS Circuit Design, Layout, and Simulation", IEEE Press, 1998. (3) N. H. E. Weste, K. Eshraghian, "Principles of CMOS VLSI Design", 2e Addison-Wesley, 1994.
PLANNED LEARNING ACTIVITIES AND TEACHING METHODS	Lecture,Presentation,Practice
ASSESSMENT METHODS AND CRITERIA	Quantity Percentage(%) Mid-term 1 25 Assignment 2 40 Total(%) 25 Contribution of In-term Studies to Overall Grade(%) 25 Contribution of Final Examination to Overall Grade(%) 75 Total(%) 100
ECTS WORKLOAD	Activities Number Hours Workload Midterm exam 1 2 2 Preparation for Quiz 2 4 8 Individual or group work 14 3 42 Preparation for Final exam 1 12 12 Course hours 14 4 56 Preparation for Midterm exam 1 12 12 Laboratory (including preparation) 0 0 0 Final exam 1 2 2 Homework 2 8 16 Total Workload 150 Total Workload / 30 5 ECTS Credits of the Course 5
LANGUAGE OF INSTRUCTION	English
WORK PLACEMENT(S)	No