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COURSE UNIT TITLECOURSE UNIT CODESEMESTERTHEORY + PRACTICE (Hour)ECTS
ADVANCED COMPUTER ARCHITECTURES BİL575 - 3 + 0 10

TYPE OF COURSE UNITElective Course
LEVEL OF COURSE UNITMaster's Degree With Thesis
YEAR OF STUDY-
SEMESTER-
NUMBER OF ECTS CREDITS ALLOCATED10
NAME OF LECTURER(S)Assistant Professor Tülin Erçelebi Ayyıldız
LEARNING OUTCOMES OF THE COURSE UNIT At the end of this course, the students;
1) Write machine level programs using MIPS command set and debug programs which were written with this language.
2) Use SPIM simulator.
3) Know interrupts, ISA, and performance.
4) Know operation of single cycle data path and pipeline.
5) Draw pipelined data path and know Forwarding.
6) Know pipeline stalings and intel Asm.
7) Know SSE, MMX, and caches.
8) Describe structures and operation principles of virtual memories, parallel programs and OpenMP.
9) Describe Input/Output devices and shared memories.
10) Comprehend instruction level parallelism and to use it written programs.
11) Comprehend scheduling.
MODE OF DELIVERYFace to face
PRE-REQUISITES OF THE COURSENo
RECOMMENDED OPTIONAL PROGRAMME COMPONENTMachine Language & Computer Organization lessons are suggested to better understanding.
COURSE DEFINITIONBasic principles of computer architecture. Design and organization of computer architecture. Running of programs written with high level languages on computer hardware. Using of SPIM simulator. Interrupts, ISA and performance metrics. Single cycle data path, pipeline, pipelined data path and forwarding. Pipeline stallings and Intel Asm. SSE. MMX. caches. Virtual memories. Parallel programs and OpenMP. I/O. Shared memories ve instruction level parallelism. Scheduling.
COURSE CONTENTS
WEEKTOPICS
1st Week Basic principles of computer architecture.
2nd Week Design and organization of computer architecture.
3rd Week Running of programs written with high level languages on computer hardware.
4th Week Using of SPIM simulator.
5th Week Interrupts, ISA and performance metrics.
6th Week Single cycle data path, pipeline, pipelined data path and forwarding.
7th Week Single cycle data path, pipeline, pipelined data path and forwarding.
8th Week Mid-term
9th Week Pipeline stallings and Intel Asm.
10th Week SSE, MMX, caches, virtual memories, parallel programs and OpenMP.
11th Week SSE, MMX, caches, virtual memories, parallel programs and OpenMP.
12th Week I/O, shared memories ve instruction level parallelism.
13th Week Scheduling.
14th Week Scheduling.
RECOMENDED OR REQUIRED READING1. Hannessy, J. L. , Patterson, D. A., Computer Architecture: A Quantitative Approach, 3rd edition, Morgan Kaufman Pub. Inc., 1996.
2. Patterson, D. A., Hennessy, J. L., Computer Organization and Design, The Hardware/Software Interface, 3rd edition, The Morgan Kaufmann Series, 2007.
PLANNED LEARNING ACTIVITIES AND TEACHING METHODSLecture,Questions/Answers,Practice,Presentation,Problem Solving,Project,Report Preparation
ASSESSMENT METHODS AND CRITERIA
 QuantityPercentage(%)
Mid-term130
Assignment115
Project115
Total(%)60
Contribution of In-term Studies to Overall Grade(%)60
Contribution of Final Examination to Overall Grade(%)40
Total(%)100
ECTS WORKLOAD
Activities Number Hours Workload
Midterm exam122
Preparation for Quiz
Individual or group work1411154
Preparation for Final exam16969
Course hours14342
Preparation for Midterm exam14444
Laboratory (including preparation)
Final exam122
Homework
Total Workload313
Total Workload / 3010,43
ECTS Credits of the Course10
LANGUAGE OF INSTRUCTIONTurkish
WORK PLACEMENT(S)No
  

KEY LEARNING OUTCOMES (KLO) / MATRIX OF LEARNING OUTCOMES (LO)
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